VPX presents many design challenges
and experienced teams like Elma Bustronic’s are best suited
to take them on. With 480 pins per slot with up to 186 differential
pairs, there is an incredible amount of I/O to route through the
backplane. Additionally, VPX uses high-speed differential serial
signals that can switch well in excess of 3.0 GHz. The VITA 46
spec acknowledges that the backplane may require up to 16 routing
layers, and a huge 36- layer overall PCB stackup. The result could
be long via stubs which can degrade the signal. To alleviate this,
Elma Bustronic performs simulations to optimize the signal quality
of the design and minimize the negative stub effects. One key method
is to take the performance requirements, which typically would
be 3.125 GBps or 6.250 GBps and route the backplane to minimize
the layer count, but follow proper design rules. Design rules typically
specify how close signals should be to another or to components,
avoiding 90 degree bends of the signal, and so on. Reducing the
layer count can shorten the stubs, thus reducing the stub effect.
In most cases, a high-grade laminate will need to be used even
in smaller (fewer slot) backplanes. For example, the five-slot
VPX backplane uses an FR-408 low-dielectric material to enhance
performance.
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The VPX Tower offers a carrying handle for easy
portability making it ideal for prototyping, demonstrations, and
for mobile applications. The unit also features advanced EMC shielding,
scratch-resistant vinyl clad aluminum covers, and power components.
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